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TSMC Validates Magma's Solutions for 28-nm AMS Reference Flow 1.0

Magma® Design Automation (Nasdaq:LAVA), a provider of chip design software, today announced TSMC has validated the Titan™ Mixed-Signal Design Platform and FineSim™ SPICE and FineSim Pro circuit simulation products for TSMC's first Analog/Mixed-Signal (AMS) Reference Flow inclusion, targeting its most advanced 28-nanometer (nm) process technology.

The TSMC AMS Reference Flow 1.0 aims to address advanced process effects to accelerate next-generation analog/mixed-signal IC designs. The combination of the AMS Reference Flow and Magma's Titan Mixed-Signal Design Platform and FineSim circuit simulator provide users with an integrated front-end and back-end analog design solution that accelerates time-to-market by improving designer productivity and enabling analog design reuse.

TSMC AMS Reference Flow 1.0 offers an advanced multi-vendor AMS design flow fully integrated with an innovative TSMC AMS design package to manage the growing complexity of process effects as well as design complexity in 40-nm and 28-nm process nodes.

Titan and FineSim provide a robust, integrated analog design and simulation platform that complies with the requirements of the TSMC AMS Reference Flow 1.0. Leveraging the fast, accurate FineSim circuit simulation tool, Titan performs analysis of yield, multi-process corners and noise effects. The Titan physical design capabilities include constraint-driven analog placement and routing technology for fast layout prototyping and semi-automatic rule-driven layout assistance.

"Innovation in analog/mixed-signal design has long lagged behind digital design," said Anirudh Devgan, general manager of Magma's Custom Design Business Unit. "By working with TSMC, Magma can further accelerate the evolution of analog/mixed-signal design and reuse and enable our customers to develop highly differentiated and more profitable mixed-signal systems on chip (SoCs)."

"Selecting Titan and FineSim for the AMS Reference Flow is another valuable result of our ongoing collaboration with Magma to enhance analog and mixed-signal design methodologies," said S.T. Juang, senior director of Design Infrastructure Marketing at TSMC. "We're pleased to continue to strengthen the relationship between the two companies for the benefit of our mutual customers."

Magma Analog/Mixed-Signal Product Support for AMS Reference Flow 1.0

The TSMC AMS Reference Flow 1.0 is supported by key Magma products.

FineSim Pro and FineSim SPICE work with Titan to enable SPICE-level simulation and post-layout simulation with extracted parasitics.

  • FineSim Pro provides circuit-level simulation, enabling the simulation of the most challenging analog mixed-signal design with SPICE accuracy and unprecedented performance.
  • FineSim SPICE leverages Magma's Native Parallel Technology (NPT) to provide the accuracy, speed and capacity needed to simulate the most challenging analog designs.
  • The Titan Mixed-Signal Platform includes the following products:
  • Schematic Editor (SE) is a complete and powerful schematic editor, facilitates quick schematic capture and editing, advanced search and replace, easy hierarchy traversal and design management. It has full support for buses and bundles, inherited connections and netlisting of various formats.
  • Analog Simulation Environment (ASE) is a specification-driven, test-based analog simulation environment, empowers organized design verification across different operating conditions. Pass-fail indicators locate the failing cases and indicate final signoff with respect to the specifications. Features such as simulator-independent tests and device under test (DUT)-based test mapping help migrate the test benches across different versions of the design.
  • Schematic-Driven Layout (SDL) enables the creation of a connectivity-aware layout using PCells. Cross-probing, flyline displays during move and wiring, check and update of design data and opens and shorts locator functions minimize the physical verification loop by ensuring a layout-vs.-schematic (LVS)-correct layout. Pattern-based device module generation accelerates the analog layout placement. Titan SDL also allows one instance to be bound to many instances between the schematic and layout.
  • Layout Editor (LE) provides a complete set of features to accomplish full-custom layout design in fewer clicks. Its high capacity and speed provides mixed-signal chip integration within a single environment. Titan LE also provides advanced features like live-DRC, automatic guard-ring creation, net tracing, PCell abutment and interactive wire creation that includes bus routing.
  • Analog Virtual Prototyper (AVP) includes a detailed device placement engine that produces a high-quality, DRC-clean layout. The powerful constraint-based placement can handle various placement styles including area, row and stack for new layouts.
  • Shape-Based Router (SBR) provides constraints such as shielding, differential pair routing, star and matched routing, enabling this shape-based router to achieve highly precise analog routing results.



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