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Advanced Flip Chip Packaging Technology from STATS ChipPAC

STATS ChipPAC Ltd. ("STATS ChipPAC" or the "Company") (SGX-ST: STATSChP), a leading semiconductor test and advanced packaging service provider, today launched the innovative fcCuBE™ technology, an advanced flip chip packaging technology that features copper (Cu) column bumps, Bond-on-Lead (BOL) interconnection and Enhanced assembly processes.

fcCuBE technology delivers high input/output (I/O) density, high performance and superior reliability in advanced silicon nodes. The fcCuBE technology offers enhanced flip chip packaging with a 20-40% lower cost over standard flip chip packaging, a compelling value with price points comparable to mainstream semiconductor packaging solutions.

As semiconductor devices are scaled to advanced wafer technology nodes of 45/40nm and below, innovations in package structure, design and assembly process are key to achieving high performance, cost-effective product solutions. fcCuBE technology addresses a complex set of packaging challenges and delivers important benefits including:

  • Ultra high I/O escape routing density
  • Scalability to very fine bump pitches of 80 micron and below with finer effective pitches
  • Significant reduction of stress on Ultra low-k (ELK/ULK) structures that has been proven down to 45/40 nanometer (nm) and 28nm silicon structures
  • Broad fab node compatibility
  • Higher resistance to electromigration
  • Lead-free alternative to conventional lead-free bumps and solder-based bumps
  • A 20-40% lower cost over standard flip chip packages for most designs

"We have taken our innovative Low Cost Flip Chip technology and enhanced it to achieve greater design flexibility and performance across a broader range of applications, I/O requirements and fab nodes. The compatibility of fcCuBE technology with advanced silicon nodes has been proven down to 45/40nm, and early testing at the 28nm silicon node have shown equally promising results. The significance of fcCuBE comes from the combination of advancements we have made in materials, structure and manufacturing process capabilities," said Dr. Han Byung Joon, Executive Vice President and Chief Technology Officer, STATS ChipPAC.

fcCuBE technology is based on STATS ChipPAC's patented BOL interconnect structure which has been combined with Cu column bump to deliver an ultra high I/O escape routing density with a finer bump pitch compared to standard solder bumps. The advancement enables more relaxed substrate design rules than standard flip chip packaging and provides scalability to very fine bump pitches of 80 micron and below.

The fcCuBE solution also offers a significant reduction of flip chip packaging stress on ELK/ULK structures in advanced silicon nodes and a higher resistance to the electromigration phenomenon which can result from the higher current density induced by the scaling of features. Although copper is a harder bump material that can cause damage to ELK/ULK layers in finer silicon nodes, the fcCuBE interconnect structure provides an effective solution to the challenges in the semiconductor industry. STATS ChipPAC has completed extensive thermo-mechanical simulation testing on fcCuBE technology with results demonstrating a significant reduction of stress on ELK/ULK structures which are consistent with empirical data generated with 45/40nm as well as 28nm node product test vehicles.

In terms of the design flexibility of fcCuBE, Dr. Han said, "We are seamlessly deploying the core fcCuBE technology beyond traditional single-die flip chip packaging into more complex stacked/3D packages including Package-on-Package (PoP), Package-in-Package (PiP), flip chip/wire bond hybrid packages and next-generation Through Silicon Via (TSV) configurations."

The robust fcCuBE™ interconnect structure has proven to be a successful lead-free alternative to solder-based bump structures and supports the semiconductor industry's transition to environmentally friendly materials in flip chip packages. fcCuBE technology has demonstrated excellent reliability, exceeding the industry minimum requirements using JEDEC standard tests.

"fcCuBE technology is raising the bar on what flip chip packages can deliver in terms of increased performance, superior reliability and miniaturisation with a compelling value at low price points. We have enhanced our technology to achieve an advanced flip chip solution that scales to finer silicon nodes and uses our standard, cost-effective manufacturing process to deliver fcCuBE at a price point that offers a clear competitive advantage for our customers. fcCuBE technology is a compelling solution for a wide cross section of end products in the mobile/handheld, computing and high-end network/telecom markets," said Dr. Raj Pendse, STATS ChipPAC's Vice President of Product and Technology Marketing.


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