Posted in | Nanofabrication

Amkor Grants GLOBALFOUNDRIES Non-Exclusive License to Copper Pillar Wafer Bump Technology

Amkor Technology, Inc., a leading provider of semiconductor assembly and test services, today announced that it has granted GLOBALFOUNDRIES a non-exclusive license to its proprietary copper pillar wafer bump technology.

The agreement provides for the transfer of Amkor’s copper pillar wafer bump technology to GLOBALFOUNDRIES and a license under Amkor’s intellectual property to enable GLOBALFOUNDRIES to bump wafers based on this technology.

“Technology leadership and innovation are fundamental to Amkor’s success. Since its introduction in 2010, our proprietary copper pillar wafer bump technology has been widely adopted for use in high volume production in many applications, including the smartphone and tablet markets,” said Dr. Choon Heung Lee, Amkor’s executive vice president and chief technology officer. “We are pleased to license our copper pillar wafer bump technology to GLOBALFOUNDRIES, a world class, leading edge foundry.”

“GLOBALFOUNDRIES is committed to providing customers of our leading edge fab technology with fully integrated solutions. Silicon to package integration is a key component of these solutions and we are pleased to have partnered with Amkor, a technology leader for outsourced semiconductor packaging and test services, to expand our wafer bumping services to include capabilities that can further extend our copper pillar bump manufacturing,” said David McCann, Vice President of Packaging R&D at GLOBALFOUNDRIES. “Semiconductor device scaling drives higher density off chip interconnect requirements. Copper pillar bumping is a critical part of bringing leading edge semiconductor devices to market and this capability enhances our growing open ecosystem of manufacturing services and partners.”

Amkor’s copper pillar wafer bump technology enables low profile and small area packaging, which is required for the mobile device market. Copper pillar technology supports 3D fine pitch memory interfaces and is utilized in 2.5D packaging where fine pitch multi-die interconnects can reduce system level costs and shorten time-to-market as compared to SoC platforms. In addition, Amkor’s copper pillar wafer bump technology supports substantial die-to-die bandwidth between memory and logic devices, greatly reduces power consumption in high-performance products, and enables high speed interfaces when applied to analog and RF applications.

Source: http://www.amkor.com/

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