Toppan Printing Develops New Photomask Process for 22nm and 20nm Devices

Toppan Printing Co., Ltd. today announced that it has developed a photomask manufacturing process at its facility in Asaka, Japan, to support 22nm and 20nm semiconductor device production.

This process was developed through Toppan’s ongoing joint development project with IBM. Toppan is ready to support 22nm and 20nm photomask prototyping as well as production for leading-edge semiconductor manufacturing customers.

Semiconductors have become increasingly sophisticated due to growing demand for telecommunication devices and highly complex and multifunctional digital consumer electronic products. Such advanced semiconductors are expected to have better performance, lower power consumption, and lower cost. Photomasks play a critical role in producing semiconductors that meet those requirements. The new photomask process from Toppan will help accelerate the production of semiconductors for next-generation technologies.

Although photomasks are becoming more complex, the IBM-Toppan Photomask Joint Development Project collaborated with IBM wafer-technology teams in East Fishkill and Albany, N.Y., to enhance photomask technology while also achieving significant development-cost savings. The latest photomask technology solution accommodates wafer requirements for advanced double patterning and source mask optimization (SMO)1 solutions to extend the capabilities of 193nm wavelength argon fluoride (ArF) immersion optical lithography. Despite the attention focused on EUV and other next-generation lithography technologies, these alternatives present significant challenges to delivery of manufacturing-ready solutions for the 22nm and 20nm nodes.

To support the global semiconductor ecosystem, photomask technologies must remain ahead of wafer schedules and provide better capability. One method of accomplishing this is to enhance wafer performance through development of novel mask material and associated photomask process integration. A new, thinner opaque MoSi on glass (OMOG) material for improved photomask and wafer performance has been developed. The photomask advantages realized are improved flatness, less process-induced pattern placement change, increased cleaning durability, better resolution, and superior image uniformity.

The improvements enabled by thin OMOG for wafer printing are even more revolutionary. The reduced topography associated with thin OMOG allows for smaller electromagnetic field bias2, improved wafer manufacturability and reduced mask pattern constraints. Relaxed mask pattern constraints increase optical proximity correction flexibility on key features such as sub-resolution assists and corner-to-corner gaps. Superior overall lithography performance can be obtained through a combination of mask improvements and wafer printing benefits.

Details of this new photomask technology will be presented at the 2010 SPIE Photomask Technology conference, Sept. 13-16 in Monterey, Calif.

“This announcement marks a significant milestone in the successful, multi-year joint development collaboration between Toppan and IBM,” said Gary Patton, Vice President of IBM Semiconductor Research & Development Center. “Photomasks are critical to enabling technology for semiconductor manufacturing, and together our two companies have delivered an advanced mask manufacturing technology that can help speed the development, volume production and time-to-market of 22nm and smaller devices.”

“The collaborative work between Toppan and IBM achieved another photomask technology innovation today,” said Toshiro Masuda, Deputy Head of Electronics Division and Managing Director of Toppan Printing. “Toppan will continue to support our semiconductor manufacturing customers by leveraging this newly developed photomask process to contribute to the evolution of the semiconductor industry.”



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