Jul 20 2007
Dongbu HiTek today announced the immediate availability of ARM® low-power and speed-and-density optimized physical IP for designers developing CMOS chips processed at the 130-nanometer (nm) node. The licensed ARM Metro™ and SAGE-X™ standard libraries including Power Management Kits and memory compilers, announced in January 2007, support advanced chip solutions targeting battery-operated applications.
According to Dr. Jae Song, EVP for Dongbu HiTek, customers have immediate access to the 130nm physical IP via the ARM website at no charge. He confirmed that the standard cell libraries maximize design freedom to extend battery life by minimizing power consumption, particularly during standby operation of mobile handset and consumer products such as PMPs, MP3 players and feature-rich phones.
“Compared to existing design libraries that claim to improve power management, the ARM products offer more standard cells with more power consumption options,” said Dr. Song. “These libraries can therefore optimize power use by giving fabless chip designers more freedom.” He presented the following example:
An existing typical library provides two cells - one with a power consumption level of 1.0 uA and the other with 2.0 uA. In a situation where 1.5 uA level was required to process specific data, the design was based on the cell with a power consumption level of 2.0 uA, resulting in the waste of the remaining 0.5 uA. Dongbu HiTek's libraries licensed from ARM, however, offer more cells with more power consumption levels, such as 1.2 uA and 1.5 uA, in addition to 1.0 uA and 2.0 uA, enabling designs with a wider range of choices, thereby optimizing power use.
The ARM libraries offer standard cells that are about 40 percent smaller than those used in the earlier 0.18-micron library, and the ARM Metro standard cells offer an additional 10-15 percent area reduction over SAGE-X in the 130nm node. The ARM Metro standard cell library includes power-management kits that enable dynamic and leakage power saving techniques such as clock gating, multi-voltage islands and power gating. Accordingly, the migration to 130nm processing paves the way for yielding more useful chips per wafer, and hence the opportunity to be more price competitive.
“As a member of the ARM Connected Community, our continuing collaboration with ARM reflects Dongbu HiTek’s strategic initiative to establish an independent design support environment with high-density, low-power functions that are the very best in their class,” added Dr. Song.